I-MOSFET yangoku ibambe iSekethe yokuFakwa kweSicelo

I-MOSFET ephethe isekethe equka i-resistors R1-R6, i-electrolytic capacitors C1-C3, i-capacitor C4, i-PNP triode VD1, i-diode D1-D2, i-intermediate relay K1, i-voltage comparator, isiseko sexesha elimbini elidibeneyo i-chip NE556, kunye ne-MOSFET Q1, nge-pin ye-6 ye-double time base edibeneyo ye-chip NE556 esebenza njengegalelo lomqondiso, kunye nesiphelo esinye ye-resistor R1 idityaniswe ngexesha elifanayo kwi-Pin 6 ye-double-time base edibeneyo ye-chip NE556 isetyenziswe njengegalelo lomqondiso, isiphelo esinye se-resistor R1 sidityaniswe kwi-pin 14 ye-double-time base edibeneyo ye-chip NE556, enye isiphelo. ye-resistor R2, enye isiphelo se-resistor R4, i-emitter ye-PNP transistor VD1, i-drain ye-MOSFET Q1, kunye ne-DC power supply, kunye nesinye isiphelo i-resistor R1 ixhunywe kwi-pin ye-1 ye-double-time base edibeneyo ye-chip NE556, i-pin 2 ye-double-time base edibeneyo ye-chip NE556, i-electrolytic capacitance ye-capacitor C1, kunye ne-relay ephakathi. I-K1 ngokuqhelekileyo ivaliwe uqhagamshelwano lwe-K1-1, enye isiphelo se-relay ephakathi i-K1 ngokuqhelekileyo ivaliwe uqhagamshelwano lwe-K1-1, i-pole negative ye-electrolytic capacitor C1 kunye nenye isiphelo se-capacitor C3 idityaniswe kumhlaba wokunikezelwa kwamandla, enye isiphelo se-capacitor C3 iqhagamshelwe kwiphini yesi-3 yesiseko sexesha elimbini elidityanisiweyo le-chip NE556, ipini yesi-4 yexesha elibini lesiseko esihlanganisiweyo se-chip NE556 siqhagamshelwe kwinto elungileyo. I-pole ye-electrolytic capacitor C2 kunye nesinye isiphelo se-resistor R2 ngexesha elifanayo, kunye ne-pole negative ye-electrolytic capacitor C2 ixhunywe kumhlaba wonikezelo lwamandla, kwaye i-pole negative ye-electrolytic capacitor C2 ixhunyiwe kumhlaba wokubonelela ngombane. Ipali engalunganga ye-C2 iqhagamshelwe kumhlaba wonikezelo lwamandla, ipini ye-5 yexesha eliphindwe kabini isiseko esihlanganisiweyo se-chip NE556 siqhagamshelwe kwelinye isiphelo se-resistor R3, esinye isiphelo se-resistor R3 siqhagamshelwe kwigalelo lesigaba esilungileyo somlinganisi wombane. , igalelo lesigaba esibi somlinganisi wombane siqhagamshelwe kwisibonda esilungileyo se-diode D1 kunye nesinye isiphelo se-resistor R4 ngaxeshanye, ipali engalunganga ye-diode D1 iqhagamshelwe kumandla. umhlaba wokubonelela, kunye nemveliso yomlinganiso we-voltage ixhunyiwe ekupheleni kwe-resistor R5, enye isiphelo se-resistor R5 ixhunyiwe kwi-PNP triplex. Imveliso ye-voltage comparator ixhunywe kwelinye icala le-resistor R5, enye isiphelo se-resistor R5 ixhunywe kwisiseko se-PNP transistor VD1, umqokeleli we-PNP transistor VD1 uxhunywe kwi-pole positive ye-diode. I-D2, i-pali engafanelekanga ye-diode D2 ixhunyiwe ekupheleni kwe-resistor R6, isiphelo se-capacitor C4, kunye nesango le-MOSFET ngokufanayo. ixesha, elinye isiphelo resistor R6, esinye isiphelo capacitor C4, kunye nesinye ekupheleni intermediate relay K1 zonke ziqhagamshelwe kumhlaba wonikezelo lwamandla kunye nesinye isiphelo esiphakathi relay K1 idityaniswe kumthombo we umthombo weI-MOSFET.

Ukugcinwa kwesekethe ye-MOSFET, xa i-A ibonelela ngophawu olusezantsi lwe-trigger, ngeli xesha isiseko sexesha elibini elidityanisiweyo se-chip NE556 iseti, isiseko sexesha elimbini elidityanisiweyo le-chip NE556 ipini ye-5 yenqanaba eliphezulu, inqanaba eliphezulu kwigalelo lesigaba esilungileyo somlinganisi wombane, i-negative chip. igalelo lesigaba somthelekisi wombane nge-resistor R4 kunye ne-diode D1 ukubonelela ngevolthi yereferensi, ngeli xesha, umgangatho wokuthelekisa umbane ophuma kwinqanaba eliphezulu, inqanaba eliphezulu ukwenza I-Triode VD1 iqhuba, i-current flowing evela kumqokeleli we-triode VD1 ihlawulisa i-capacitor C4 nge-diode D2, kwaye ngelo xesha, i-MOSFET Q1 iqhuba, ngeli xesha, i-coil ye-intermediate relay K1 ifakwe, kunye ne-intermediate relay K1 ngokuqhelekileyo. uqhagamshelwano oluvaliweyo K 1-1 luqhawulwe, kwaye emva konxibelelwano oluphakathi K1 ngokuqhelekileyo luvaliwe uqhagamshelwano K 1-1 yi. kuqhawulwe, unikezelo lwamandla e-DC ukuya kwi-1 kunye ne-2 yeenyawo ze-double-time base edibeneyo ye-chip NE556 ibonelela nge-voltage yonikezelo igcinwe de i-voltage kwi-pin 1 kunye ne-pin 2 ye-double-time base edibeneyo ye-chip NE556 ihlawuliswe kwi-2 / I-3 yombane wobonelelo, isiseko sexesha elimbini esidityanisiweyo se-chip NE556 sisetwa kwakhona ngokuzenzekelayo, kwaye i-pin 5 ye-double-time base edibeneyo ye-chip NE556 ibuyiselwa ngokuzenzekelayo. inqanaba eliphantsi, kwaye iisekethe ezilandelayo azisebenzi, ngelixa ngeli xesha, i-capacitor C4 ikhutshwe ukuze igcine i-MOSFET Q1 conduction de kube sekupheleni kwe-capacitance ye-C4 yokukhupha kunye ne-intermediate relay K1 coil release, i-intermediate relay K1 ngokuqhelekileyo ivaliwe uqhagamshelwano. I-K 11 ivaliwe, ngeli xesha ngokusebenzisa i-relay evaliweyo ephakathi K1 ngokuqhelekileyo ivaliwe uqhagamshelwano K 1-1 iya kuba lixesha elimbini isiseko esihlanganisiweyo chip I-NE556 unyawo olu-1 kunye neenyawo ezi-2 zokukhutshwa kwamandla ombane, kwixesha elizayo kwisiseko sexesha elimbini elihlanganisiweyo i-chip NE556 pin 6 ukubonelela ngesignali ephantsi ye-trigger ukwenza isiseko sexesha elimbini elidibeneyo i-chip NE556 iseti ukulungiselela.

Ulwakhiwo lwesekethe yesi sicelo lulula kwaye inoveli, xa isiseko sexesha elimbini elidibeneyo i-chip NE556 pin 1 kunye ne-pin 2 itshaja ukuya kwi-2/3 yombane wobonelelo, isiseko sexesha elibini elihlanganisiweyo i-chip NE556 inokubuyiselwa ngokuzenzekelayo, isiseko sexesha elimbini I-NE556 pin 5 ibuyela ngokuzenzekelayo kwinqanaba eliphantsi, ukwenzela ukuba iisekethe ezilandelayo zingasebenzi, ukuze ziyeke ngokuzenzekelayo ukutshaja i-capacitor C4, kwaye emva koko. ukumisa ukutshaja kwe-capacitor C4 egcinwe yi-MOSFET Q1 conductive, esi sicelo sinokuqhubeka nokugcinaI-MOSFETI-Q1 conductive imizuzwana emi-3.

Ibandakanya i-resistors i-R1-R6, i-electrolytic capacitors C1-C3, i-capacitor C4, i-PNP transistor VD1, i-diodes D1-D2, i-intermediate relay K1, i-voltage comparator, isiseko sexesha elibini isiseko esihlanganisiweyo se-chip NE556 kunye ne-MOSFET Q1, i-pin 6 yesiseko sexesha elibini elihlanganisiweyo. I-chip NE556 isetyenziswa njengegalelo lomqondiso, kwaye enye isiphelo se-resistor R1 ixhunyiwe kwi-pin I-14 yesiseko sexesha elibini isiseko esihlanganisiweyo se-chip NE556, i-resistor R2, i-pin 14 yexesha eliphindwe kabini lesiseko esihlanganisiweyo se-chip NE556 kunye ne-pin 14 yexesha eliphindwe kabini lesiseko esihlanganisiweyo se-chip NE556, kunye ne-resistor R2 iqhagamshelwe kwi-pin 14 yexesha eliphindwe kabini lesiseko se-chip edibeneyo. NE556. ipini ye-14 ye-double-time base edibeneyo ye-chip NE556, enye isiphelo se-resistor R2, enye isiphelo se-resistor R4, i-PNP transistor

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Xa i-A ibonelela ngesignali esezantsi ye-trigger, emva koko isiseko sexesha elimbini esidibeneyo se-chip NE556 iseti, isiseko sexesha elibini elidibeneyo i-chip NE556 iphini ye-5 yemveliso ephezulu, inqanaba eliphezulu kwigalelo lesigaba esilungileyo somlinganisi wombane, igalelo lesigaba esibi sombane. Umlinganisi wombane we-resistor R4 kunye ne-diode D1 ukubonelela nge-voltage yereferensi, ngeli xesha, i-voltage comparator output level ephezulu, inqanaba eliphezulu le-transistor VD1 conduction, okwangoku ihamba isuka kumqokeleli we-transistor VD1 nge-diode D2 ukuya kwi-capacitor C4 ukutshaja, ngeli xesha, i-relay ephakathi ye-K1 yokufunxa ikhoyili, i-relay ephakathi ye-K1 yokufunxa ikhoyili. Ikhoyo ngoku ephuma kumqokeleli we-transistor VD1 ihlawuliswa kwi-capacitor C4 nge-diode D2, kwaye ngexesha elifanayo,I-MOSFETI-Q1 iqhuba, ngeli xesha, i-coil ye-relay ephakathi i-K1 iyafunxa, kunye ne-intermediate relay K1 yoqhagamshelwano oluqhelekileyo oluvaliweyo lwe-K 1-1 lunqanyuliwe, kwaye emva konxibelelwano oluphakathi lwe-K1 oluqhelekileyo oluvaliweyo lwe-K 1-1 luqhawulwe, amandla Umbane wobonelelo olubonelelwa ngumthombo wamandla we-DC ukuya kwi-1 kunye ne-2 yeenyawo ze-timebase edibeneyo ye-chip NE556 igcinwe kude kube Xa amandla ombane ephini I-1 kunye ne-2 ye-chip ye-double-time base edibeneyo ye-chip i-NE556 ihlawuliswa kwi-2/3 ye-voltage yokubonelela, isiseko sexesha eliphindwe kabini i-chip NE556 sisetwa ngokutsha ngokuzenzekelayo, kunye ne-pin 5 ye-double-time base base edibeneyo ye-chip NE556 izenzekela ngokuzenzekelayo. ibuyiselwe kumgangatho ophantsi, kwaye iisekethe ezilandelayo azisebenzi, kwaye ngeli xesha, i-capacitor C4 ikhutshwe ukuze kugcinwe i-MOSFET Q1 conduction. kude kube sekupheleni kokukhutshwa kwe-capacitor C4, kunye nekhoyili ye-relay ephakathi K1 ikhululiwe, kunye ne-intermediate relay K1 ngokuqhelekileyo ivaliwe uqhagamshelwano K 1-1 inqanyuliwe. I-Relay K1 ngokuqhelekileyo ivaliwe uqhagamshelwano K 1-1 ivaliwe, ngeli xesha ngokusebenzisa i-relay ephakathi evaliweyo K1 ngokuqhelekileyo ivaliwe uqhagamshelwano K 1-1 iya kuba kabini-ixesha isiseko edityanisiweyo chip NE556 1 iinyawo kunye neenyawo 2 kukukhululwa kwamandla ombane, kwixesha elizayo ukuze isiseko sexesha elibini isiseko esihlanganisiweyo se-chip NE556 pin 6 ukubonelela ngesignali yokuqalisa ukubeka ephantsi, ukwenzela ukuba kwenziwe amalungiselelo esiseko sexesha elibini elidibeneyo ye-chip NE556 iseti.