I-MOSFET ephethe isekethe equka i-resistors R1-R6, i-electrolytic capacitors C1-C3, i-capacitor C4, i-PNP triode VD1, i-diode D1-D2, i-intermediate relay K1, i-voltage comparator, isiseko sexesha elimbini elidibeneyo i-chip NE556, kunye ne-MOSFET Q1, kunye nepini ye-6 ye-double time base edibeneyo ye-chip NE556 esebenza njengegalelo lomqondiso, kunye nesiphelo esinye se-resistor R1 esidityaniswe ngexesha elifanayo kwi-Pin 6 ye-double-time base edibeneyo ye-chip NE556 isetyenziswa njengegalelo lomqondiso, Esinye isiphelo se-resistor R1 siqhagamshelwe kwi-pin 14 ye-double-time base edibeneyo ye-chip NE556, enye isiphelo se-resistor R2, enye isiphelo se-resistor R4, i-emitter ye-PNP transistor VD1, i-drain ye-MOSFET Q1, kunye ne-DC. ukunikezelwa kwamandla, kunye nesinye isiphelo se-resistor R1 sixhunywe kwi-pin 1 ye-double-time base edibeneyo ye-chip NE556, i-pin 2 ye-double-time base-integrated chip NE556, i-electrolytic capacitance ye-capacitor C1, kunye ne-intermediate relay. I-K1 ngokuqhelekileyo ivaliwe uqhagamshelwano lwe-K1-1, enye isiphelo se-relay ephakathi i-K1 ngokuqhelekileyo ivaliwe uqhagamshelwano lwe-K1-1, i-pole negative ye-electrolytic capacitor C1 kunye nenye isiphelo se-capacitor C3 idityaniswe kumhlaba wokunikezelwa kwamandla, enye isiphelo se-capacitor C3 iqhagamshelwe kwiphini yesi-3 yesiseko sexesha elimbini elidityanisiweyo le-chip NE556, ipini yesi-4 yesiseko sexesha elimbini i-chip NE556 iqhagamshelwe kwipali elungileyo ye-electrolytic capacitor C2 kunye nesinye isiphelo se-resistor R2 ngaxeshanye, kwaye I-pole negative ye-electrolytic capacitor C2 ixhunywe kumhlaba wonikezelo lwamandla, kwaye i-pole negative ye-electrolytic capacitor C2 ixhunywe kumhlaba wokubonelela ngombane. Ipali engalunganga ye-C2 iqhagamshelwe kumhlaba wonikezelo lwamandla, ipini ye-5 yexesha eliphindwe kabini isiseko esihlanganisiweyo se-chip NE556 siqhagamshelwe kwelinye isiphelo se-resistor R3, esinye isiphelo se-resistor R3 siqhagamshelwe kwigalelo lesigaba esilungileyo somlinganisi wombane. , igalelo lesigaba esibi somlinganisi wombane siqhagamshelwe kwipali elungileyo ye-diode D1 kunye nesinye isiphelo se-resistor R4 ngaxeshanye, ipali engalunganga ye-diode D1 iqhagamshelwe kumhlaba wonikezelo lwamandla, kunye nemveliso i-voltage comparator ixhunywe ekupheleni kwe-resistor R5, enye isiphelo se-resistor R5 ixhunyiwe kwi-PNP triplex. Imveliso ye-voltage comparator ixhunywe kwelinye icala le-resistor R5, enye isiphelo se-resistor R5 ixhunywe kwisiseko se-PNP transistor VD1, umqokeleli we-PNP transistor VD1 uxhunywe kwi-pole positive ye-diode. I-D2, isibonda esibi se-diode i-D2 idibaniswe ekupheleni kwe-resistor R6, isiphelo se-capacitor C4, kunye nesango le-MOSFET ngexesha elifanayo, elinye isiphelo se-resistor R6, esinye isiphelo i-capacitor C4, kunye nesinye isiphelo sesilayidi esiphakathi i-K1 zonke ziqhagamshelwe kumhlaba wonikezelo lwamandla kwaye esinye isiphelo sesilayidi esiphakathi se-K1 sidityaniswe kumthombo womthombo wombane.I-MOSFET.
Ukugcinwa kwesekethe ye-MOSFET, xa i-A ibonelela ngophawu olusezantsi lwe-trigger, ngeli xesha isiseko sexesha elibini elidityanisiweyo se-chip NE556 iseti, isiseko sexesha elimbini elidityanisiweyo le-chip NE556 ipini ye-5 yenqanaba eliphezulu, inqanaba eliphezulu kwigalelo lesigaba esilungileyo somlinganisi wombane, i-negative chip. Igalelo lesigaba somchasi we-voltage ngu-resistor R4 kunye ne-diode D1 ukunika i-voltage yereferensi, ngeli xesha, i-voltage comparator output level ephezulu, inqanaba eliphezulu ukwenza i-Triode VD1 iqhube, ikhoyo ngoku iphuma kumqokeleli we-triode VD1 ihlawulisa i-capacitor C4 nge-diode D2, kwaye kwangaxeshanye, i-MOSFET Q1 iqhuba, ngeli xesha, i-coil ye-relay ephakathi ye-K1 ifakwe, kunye ne-intermediate relay K1 ngokuqhelekileyo ivaliwe uqhagamshelwano lwe-K 1-1 lunqanyuliwe, kwaye emva kokuphakathi. relay K1 ngokuqhelekileyo ivaliwe uqhagamshelwano K 1-1 luqhawulwe, unikezelo lwamandla DC ukuya 1 kunye 2 iinyawo isiseko kabini-isiseko edityanisiweyo chip NE556 ibonelela ombane wonikezelo lugcinwe de ombane kwipin 1 kunye pin 2 kabini- Isiseko sexesha esihlanganisiweyo se-chip NE556 sihlawuliswa ukuya kwi-2/3 yombane wobonelelo, isiseko sexesha eliphindwe kabini se-chip NE556 sisetwa ngokutsha ngokuzenzekelayo, kunye ne-pin 5 ye-doual-time base edibeneyo ye-chip NE556 ibuyiselwa ngokuzenzekelayo kwinqanaba eliphantsi, kwaye iisekethe ezilandelayo azisebenzi, ngelixa ngeli xesha, i-capacitor C4 ikhutshwe ukugcina i-MOSFET Q1 conduction de kube sekupheleni kwe-capacitance C4 yokukhupha kunye ne-intermediate relay K1 coil release, i-intermediate relay K1 ngokuqhelekileyo ivaliwe uqhagamshelwano lwe-K 11 luvaliwe. ixesha ngokusebenzisa i-relay ephakathi evaliweyo i-K1 ngokuqhelekileyo ivaliwe uqhagamshelwano lwe-K 1-1 iya kuba ngamaxesha amabini isiseko esihlanganisiweyo se-chip NE556 unyawo olu-1 kunye neenyawo ezi-2 zokukhutshwa kwamandla ombane, kwixesha elizayo ukuya kwixesha elibini isiseko esihlanganisiweyo se-chip NE556 pin 6 ukubonelela ngexabiso eliphantsi. isignali yokuqalisa ukwenza isiseko sexesha elimbini elidityanisiweyo chip NE556 iseti ukulungiselela.
Ulwakhiwo lwesekethe yesi sicelo lulula kwaye inoveli, xa isiseko sexesha elimbini elidibeneyo i-chip NE556 pin 1 kunye ne-pin 2 itshaja ukuya kwi-2/3 yombane wobonelelo, isiseko sexesha elibini elihlanganisiweyo i-chip NE556 inokubuyiselwa ngokuzenzekelayo, isiseko sexesha elimbini I-NE556 pin 5 ibuyela ngokuzenzekelayo kwinqanaba eliphantsi, ukwenzela ukuba iisekethe ezilandelayo zingasebenzi, ukwenzela ukuba uyeke ngokuzenzekelayo ukutshaja i-capacitor C4, kwaye emva kokumisa ukutshaja kwe-capacitor C4 egcinwe yi-MOSFET Q1 conductive, esi sicelo sinokugcina ngokuqhubekayo.I-MOSFETI-Q1 conductive imizuzwana emi-3.
Ibandakanya i-resistors i-R1-R6, i-electrolytic capacitors C1-C3, i-capacitor C4, i-PNP transistor VD1, i-diodes D1-D2, i-intermediate relay K1, i-voltage comparator, isiseko sexesha elibini isiseko esihlanganisiweyo se-chip NE556 kunye ne-MOSFET Q1, i-pin 6 yesiseko sexesha elibini elihlanganisiweyo. I-chip NE556 isetyenziswa njengegalelo lomqondiso, kwaye esinye isiphelo se-resistor R1 siqhagamshelwe kwi-pin 14 yexesha eliphindwe kabini lesiseko esihlanganisiweyo se-chip NE556, i-resistor R2, i-pin 14 yexesha elibini isiseko esihlanganisiweyo se-chip NE556 kunye ne-pin 14 yexesha elibini. isiseko esihlanganisiweyo se-chip NE556, kunye ne-resistor R2 idityaniswe kwi-pin 14 yexesha eliphindwe kabini lesiseko esihlanganisiweyo se-chip NE556. ipini ye-14 ye-double-time base edibeneyo ye-chip NE556, enye isiphelo se-resistor R2, enye isiphelo se-resistor R4, i-PNP transistor
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Xa i-A ibonelela ngesignali esezantsi ye-trigger, emva koko isiseko sexesha elimbini esidibeneyo se-chip NE556 iseti, isiseko sexesha elibini elidibeneyo i-chip NE556 iphini ye-5 yemveliso ephezulu, inqanaba eliphezulu kwigalelo lesigaba esilungileyo somlinganisi wombane, igalelo lesigaba esibi sombane. i-voltage comparator yi-resistor R4 kunye ne-diode D1 ukunika i-voltage yereferensi, ngeli xesha, i-voltage comparator output yezinga eliphezulu, inqanaba eliphezulu le-transistor VD1 conduction, ukuhamba kwangoku ukusuka kumqokeleli we-transistor VD1 nge-diode D2 ukuya i-capacitor C4 itshaja, ngeli xesha, i-intermediate relay K1 coil suction, i-intermediate relay K1 coil suction. Ikhoyo ngoku ephuma kumqokeleli we-transistor VD1 ihlawuliswa kwi-capacitor C4 nge-diode D2, kwaye ngexesha elifanayo,I-MOSFETI-Q1 iqhuba, ngeli xesha, i-coil ye-relay ephakathi i-K1 iyafunxa, kunye ne-intermediate relay K1 yoqhagamshelwano oluqhelekileyo oluvaliweyo lwe-K 1-1 lunqanyuliwe, kwaye emva konxibelelwano oluphakathi lwe-K1 oluqhelekileyo oluvaliweyo lwe-K 1-1 luqhawulwe, amandla Umbane wobonelelo obonelelwa ngumthombo wamandla we-DC ukuya kwi-1 kunye ne-2 yeenyawo ze-timebase edibeneyo ye-chip NE556 igcinwe kude kube xa umbane kwi-pin 1 kunye ne-2 ye-double-time base base edibeneyo yechip NE556 ihlawuliswa ukuya kwi-2/3 ye I-voltage yokubonelela, isiseko sexesha elibini elidibeneyo i-chip NE556 isetwa kwakhona ngokuzenzekelayo, kwaye i-pin ye-5 ye-double-time base edibeneyo ye-chip NE556 ibuyiselwa ngokuzenzekelayo kwinqanaba eliphantsi, kwaye iisekethe ezilandelayo azisebenzi, kwaye ngeli xesha, I-capacitor C4 ikhutshwe ukuze igcine i-MOSFET Q1 conduction de kube sekupheleni kokukhutshwa kwe-capacitor C4, kunye ne-coil ye-relay ephakathi kwe-K1 ikhutshwe, kwaye i-relay ephakathi kwe-K1 ngokuqhelekileyo ivaliwe uqhagamshelwano K 1-1 inqanyuliwe. I-Relay K1 ngokuqhelekileyo ivaliwe uqhagamshelwano K 1-1 ivaliwe, ngeli xesha ngokusebenzisa i-relay ephakathi evaliweyo K1 ngokuqhelekileyo ivaliwe uqhagamshelwano K 1-1 iya kuba kabini-ixesha isiseko edityanisiweyo chip NE556 1 iinyawo kunye neenyawo 2 kukukhululwa kwamandla ombane, kwixesha elizayo ukuze isiseko sexesha elibini isiseko esihlanganisiweyo se-chip NE556 pin 6 ukubonelela ngesignali yokuqalisa ukubeka ephantsi, ukwenzela ukuba kwenziwe amalungiselelo esiseko sexesha elibini elidibeneyo ye-chip NE556 iseti.
Ixesha lokuposa: Apr-19-2024